There is an increased demand for materials and electrical components which can protect electronic circuits from EOS transients which produce high electric fields and usually high peak energies capable of destroying circuits or the highly sensitive electrical components in the circuits, rendering the circuits and the components non-functional, either temporarily or permanently. The EOS transient can include transient voltage or current conditions capable of interrupting circuit operation or destroying the circuit outright. Particularly, EOS transients may arise, for example, from an electromagnetic pulse, an electrostatic discharge, lightning, or be induced by the operation of other electronic or electrical components. Such transients may rise to their maximum amplitudes in microsecond to subnanosecond time frames and may be repetitive in nature. A typical waveform of an electrical overstress transient is illustrated in FIG. 1. The peak amplitude of the electrostatic discharge (ESD) transient wave may exceed 25,000 volts with currents of more than 100 amperes.
Materials for the protection against EOS transients (EOS materials) are designed to respond essentially instantaneously (i.e., ideally before the transient wave reaches its peak) to reduce the transmitted voltage to a much lower value and clamp the voltage at the lower value for the duration of the EOS transient. EOS materials are characterized by high electrical resistance values at low or normal operating voltages and currents. In response to an EOS transient, the material switches essentially instantaneously to a low electrical resistance value. When the EOS threat has been mitigated these materials return to their high resistance value. These materials are capable of repeated switching between the high and low resistance states, allowing circuit protection against multiple EOS events. EOS materials are also capable of recovering essentially instantaneously to their original high resistance value upon termination of the EOS transient. For purposes of this application, the high resistance state will be referred to as the "off-state" and the low resistance state will be referred to as the "on-state."
FIG. 2 illustrates a typical electrical resistance versus d.c. voltage relationship for EOS materials. Circuit components including EOS materials can shunt a portion of the excessive voltage or current due to the EOS transient to ground, thus, protecting the electrical circuit and its components. The major portion of the threat transient is either dissipated at the source resistance or reflected back towards the source of the threat. The reflected wave is either attenuated by the source, radiated away, or re-directed back to the surge protection device which responds with each return pulse until the threat energy is reduced to safe levels.
In particular, the present invention is directed to the application of voltage variable materials to an integrated circuit die to provide protection against EOS transients. Accordingly, any of the following EOS materials and methods for making EOS materials can be used in the present invention, the disclosures of which are incorporated herein by reference.
U.S. Provisional Patent Application No. 60/064,963 discloses compositions for providing protection against EOS. The compositions include a matrix formed of a mixture of an insulating binder, conductive particles having an average particle size of less than 10 microns, and semiconductive particles having an average particle size of less than 10 microns. The compositions utilizing relatively small particle sized conductive and semiconductive fillers exhibit clamping voltages in a range of about 30 volts to about 2,000 volts or greater.
U.S. Pat. No. 2,273,704, issued to Grisdale, discloses granular composites which exhibit non-linear current voltage relationships. These mixtures are comprised of granules of conductive and semiconductive granules that are coated with a thin insulative layer and are compressed and bonded together to provide a coherent body.
U.S. Pat. No. 2,796,505, issued to Bocciarelli, discloses a non-linear voltage regulating element. The element is comprised of conductor particles having insulative oxide surface coatings that are bound in a matrix. The particles are irregular in shape and make point contact with one another.
U.S. Pat. No. 4,726,991, issued to Hyatt et al., discloses an EOS protection material comprised of a mixture of conductive and semiconductive particles, all of whose surfaces are coated with an insulative oxide film. These particles are bound together in an insulative binder. The coated particles are preferably in point contact with each other and conduct preferentially in a quantum mechanical tunneling mode.
U.S. Pat. No. 5,476,714, issued to Hyatt, discloses EOS composite materials comprised of mixtures of conductor and semiconductor particles in the 10 to 100 micron range with a minimum proportion of 100 angstrom range insulative particles, bonded together in a insulative binder. This invention includes a grading of particle sizes such that the composition causes the particles to take a preferential relationship to each other.
U.S. Pat. No. 5,260,848, issued to Childers, discloses foldback switching materials which provide protection from transient overvoltages. These materials are comprised of mixtures of conductive particles in the 10 to 200 micron range. Semiconductor and insulative particles are also employed in these compositions. The spacing between conductive particles is at least 1000 angstroms.
Additional EOS polymer composite materials are also disclosed in U.S. Pat. Nos. 4,331,948, 4,726,991, 4,977,357, 4,992,333, 5,142,263, 5,189,387, 5,294,374, 5,476,714, 5,669,381, and 5,781,395, the teachings of which are specifically incorporated herein by reference.
A typical integrated circuit die having a plurality of input/output (I/O) conductive pads is illustrated in FIG. 3. Wires are bonded to the I/O pads and are connected to a corresponding electrical lead of a lead frame. Prior integrated circuit dies have voltage suppression components such as diodes, thyristors or transistors formed on the die near the I/O pads during the processing of the die to protect oxide layers, semiconductor junctions, and metal traces in the functional die area from the harmful effects of EOS transients. The assembly is typically encapsulated in a protective housing and the electrical leads of the lead frame which extend outwardly from the housing are formed in order to be connected to a circuit substrate (e.g., a printed circuit board). The components used to protect the functional area of the die are often relatively large, consuming costly die area which can otherwise be used for additional functions. In addition, the overall encapsulated device is relatively large, consuming costly real estate on the circuit substrate.